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Production Overview

Plastic Transistor Outline packaging (SIP) is a principal package using TH or SMD technology. It is widely used in low cost and manual applications. FSMC offers SIP3,SIP4,SIP8 packages.

Application

System In Packages are considered one of the most established industry standard packages. SIP is commonly used Hall IC,Horn power amplifier protection IC,Leakage protector in circuit,etc.

Features

* JEDEC standard compliant or reference
* Wide choice of pad sizes to meet die size per customer lead frame design capability
* Pb-free process ready and Green Molding Compound

Design Rule

Wafer Thickness
 
80~280um
Minimum Sawing
Street Width
 
≥60um
Minimum die Size
 
0.20mm*0.20mm
Maximum wafer Size
 
D≤200mm

 

Package Outline

SIP series (All units are in mm)
Number PKG TYPE Lead count Lead Width Lead Thickness bond pad POD
1 SIP-3 3 0.39 0.40 DOWN DOWN
2 SIP-4 4 0.43 0.37 DOWN DOWN
3 SIP-8 8 0.55 0.33 DOWN DOWN

Packing & Shipping

Tube:
Number PKG TYPE QTY/Tube Tube/Inner Box Total per inner box Boxe/case Total per case
1 SIP-8 25 80 2000 10 20000

 

Bulk:
Number PKG TYPE QTY/Bag Bag/Inner Box Total per inner box Boxe/case Total per case
1 SIP-3 1000 10 10000 10 100000
2 SIP-4 1000 10 10000 10 100000